(1) Field of the Invention
The present invention relates to a method for fabricating a semiconductor device, and more particularly to a method for fabricating a capacitor element of a Dynamic Random Access Memory (DRAM) in which a tantalum oxide film is used as a capacitance insulating film.
(2) Description of the Related Art
With respect to capacitor elements in VLSIs beyond 256 megabit DRAM, study is underway as to the employment of capacitance insulating films having a high dielectric constant capable of increasing the capacitance value per unit area. Among such capacitance insulating films, a tantalum oxide film formed by a Chemical Vapor Deposition (hereinafter referred to as "CVD") process is more widely being studied because the relative dielectric constant or thereof is as large as 25.about.30, the film has excellent step coverage properties, and the method for forming this film is extremely easy as compared with other insulating films having a high dielectric constant.
With reference to FIGS. 1A-1C which show in sectional views a capacitor element in a conventional DRAM cell, an explanation is made hereinafter as to the steps of fabricating a stacked type capacitor element for the conventional DRAM wherein a tantalum oxide film is used as a capacitance insulating film.
First, the structure formed is as follows. A transistor is formed on a surface of a p-type silicon substrate. This transistor is covered by an interlayer insulating film 47. A contact hole 58 is opened in the interlayer insulating film 47 in such a way as to extend to one of n-type source/drain regions of the transistor. A bit line 56, which is connected to the n-type source/drain region through the contact hole 58, is formed on a surface of the interlayer insulating film 47. An interlayer insulating film 48 is formed so as to cover the upper surfaces which include the surface of the bit line 56.
In the structure as above, another contact hole 57 is formed, which extends to the other of the source/drain regions of the transistor passing through the interlayer insulating films 48 and 47. On the entire surface, a polycrystalline silicon film doped with phosphorous (P) is formed, and this polycrystalline silicon film is patterned to form a capacitance lower electrode 2. Then, by a low pressure CVD process using a pentaethoxytantalum (Ta(OC.sub.2 H.sub.5).sub.5) gas, which is an organic material, and oxygen, a tantalum oxide film 11 is formed on a surface of the interlayer insulating film 48 including that of the capacitance lower electrode 2 (see FIG. 1A). Next, this tantalum oxide film 11 is heat-treated at a high temperature in an oxygen atmosphere in order to improve its leakage current characteristics, whereby the tantalum oxide film 11 becomes a tantalum oxide film 11B (see FIG. 1B). The heat-treating temperature is generally 700.about.900.degree. C. This is followed by the formation of a capacitance upper electrode 3 (see FIG. 1C). This capacitance upper electrode 3 employs a titanium nitride film, tungsten film or a polycrystalline silicon film.
The conventional capacitor element fabricated as above includes the following problems. During the process of fabricating the conventional capacitor element, the tantalum oxide film 11 is formed on the surface of the polycrystalline silicon film constituting the capacitance lower electrode 2 and, in order to improve the leakage current characteristics, the high temperature heat treatment is carried out in an oxygen atmosphere for the tantalum oxide film 11 to become the tantalum oxide film 11B. In the capacitor element having the capacitance insulating film formed in the above process, the capacitance value attained amounts only to a value (Cs=11.5 fF/.mu..sup.2) which is attained when the thickness is about 3 nm in terms of an equivalent silicon oxide film thickness (relative dielectric constant of a silicon oxide film being .epsilon.r=3.9). This is due to the reason that, during the high temperature heat-treatment conducted in the oxygen atmosphere, a thick silicon oxide film having a thickness of about 2 nm is formed at an interface between the tantalum oxide film 11B and the capacitance lower electrode 2. If such a capacitance insulating film (in which the silicon oxide film having a thickness of about 2 nm and the tantalum oxide film 11B are stacked) is applied to a capacitor element such as that for a 256 megabit DRAM, it is not possible to attain a sufficient capacitance value.
Furthermore, with the leakage current characteristics of the capacitor element formed by the conventional technology, the voltage at which the leakage current density J is 10.sup.-8 A/cm.sup.2 is as small as about 0.7 V so that such a capacitor element lacks characteristics sufficiently adaptable to a practical device. Also, where a high temperature heat-treatment such as activation of ion implantation or reflow of an interlayer insulating film is carried out after the formation of the capacitor element, there will be a further deterioration in the leakage current characteristics.